1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory including a plurality of wires.
2. Background Art
In recent years, nonvolatile semiconductor memories such as a NAND flash memory have been produced with smaller design rules, and smaller design rules has been studied through various processes. Accordingly, the latest process technology may suffer from defective phenomena different from defective phenomena that may occur in a process technology of the prior art.
One of the defective phenomena is, for example, a short circuit between wires.
Among short circuits between wires, only a short circuit between adjacent wires has been a problem in the prior art.
Thus in a nonvolatile semiconductor memory of the prior art, a check is made only for short circuits between adjacent wires in, for example, a product test (for example, see Japanese Patent Laid-Open No. 2001-135100).
However, processes with smaller design rules may cause short circuits not only between adjacent wires but also between wires not adjacent to each other.
As described above, a check is made only for short circuits between adjacent wires in the nonvolatile semiconductor memory of the prior art. Thus it has not been possible to detect short circuits between wires not directly adjacent to each other.